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Enhanced DFT for Fortuitous Detection of Transition Faults During Scan Shift
Conference proceeding

Enhanced DFT for Fortuitous Detection of Transition Faults During Scan Shift

Hui Jiang, Jennifer Dworak, Kundan Nepal, Theodore Manikas and IEEE
2022 IEEE 31st Microelectronics Design & Test Symposium (MDTS), pp.1-6
05/23/2022

Abstract

ATPG Delays Design for testability DFT Discrete Fourier transforms Launch on Shift Testing transition faults
Transition fault testing is an important component of modern testing for delay defects. Unfortunately, test pattern sets for delay defects tend to be significantly longer than test pattern sets for static defects. In the past, various approaches have been devised to detect static defects during scan shift to reduce test time and increase defect coverage. In this paper, we propose a DFT (Design-For-Test) enhancement to allow delay defects to be detected by stuck-at test patterns during scan shift as well.

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