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Dynamic Test Set Selection Using Implication-Based On-Chip Diagnosis
Conference proceeding

Dynamic Test Set Selection Using Implication-Based On-Chip Diagnosis

N. Alves, Y. Shi, N. Imbriglia, J. Dworak, K. Nepal, R. I. Bahar and IEEE Computer Society
2011 Sixteenth IEEE European Test Symposium, pp.211-211
05/2011

Abstract

Arrays Electrical engineering Hardware Logic Implications Multicore processing on-chip diagnosis Runtime System-on-a-chip Systematics test set selection
We propose using logic implications as a source of online diagnostic data for on-chip test set selection by taking advantage of their ability to automatically identify a restricted set of faults as the potential cause of an observed error. This information will be used to dynamically choose a test set to detect systematic latent defects or wear out in a multi core system.

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